Design and Implementation of Low-Power Viterbi Decoder for Software-Defined WiMAX Receiver

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Executive Summary

Many sophisticated signal processing tasks are performed in SDR that can be implemented on FPGA, including advanced compression algorithms, channel estimation, power control, forward error control, synchronization, equalization, and protocol management, etc. Channel coding may be considered as one of the most challenging signal-processing tasks performed in SDR. Most digital communication systems use convolutional coding to compensate for Additive White Gaussian Noise (AWGN) and the effects of other data degradation like channel fading and quantization noise.

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