Design and Implementation of Wideband Digital Down Converter on FPGA
In a Communication system, the received signals are of high data rates making it difficult to process the signals to extract information of interest. So to solve this problem DDC makes a better solution. In this paper, an efficient way of designing and implementing a Wideband Digital down Converter has been discussed. It is shown that the signal of interest extracted till now is of narrowband but in this paper extraction of wideband signals from the given ADC signal using advanced filtering and decimation techniques has been presented. Filtering is implemented in stages to obtain efficient response. Multiplier-free filter implementation providing decimation rates from 4 to 4096 has been implemented.