Hardware

Design and Optimization of Full Comparator Based on Quantum-Dot Cellular Automata

Date Added: Apr 2012
Format: PDF

Quantum-dot Cellular Automata (QCA) is one of the few alternative computing platforms that has the potential to be a promising technology because of higher speed, smaller size, and lower power consumption in comparison with CMOS technology. This paper proposes an optimized full comparator for implementation in QCA. The proposed design is compared with previous works in terms of complexity, area, and delay. In comparison with the best previous full comparator, the authors' design has 64% and 85% improvement in cell count and area, respectively. Also, it is implemented with only one clock cycle. The obtained results show that their full comparator is more efficient in terms of cell count, complexity, area, and delay compared to the previous designs.