Design and Realization of FPGA Based Off-Chip Trained MLP for Classical XOR Problem and Need of On-Chip Training
Artificial Neural Network (ANN) is an important soft computing tool. ANN is an adaptive statistical model which resembles the human brain activities. Artificial neuron is the main information processor of the network; it may inspired by biological neuron activities. The main intension of this paper is to present the importance of neural chip with learning capability. The designed sequentially trained MLP structure is used to solve the classical XOR problem and the structure is realized on FPGA device environment. By comparing the device utilization summary for the design in different families of Xilinx FPGA, the importance of platform selection for hardware implementation is presented. Finally the importance of on-chip learning is emphasized.