Design and Simulation of Multiplexer using Josephson junction using OrCAD Capture
In this paper, the authors presented here is a summary of the result obtained when multiplexer was simulated using simulator: OrCAD Capture 16.5. The multiplexer is made using the universal logic gates formed by Josephson junction. This allows them to focus their attention on solely the output characteristics and related results derived from the multiplexer. They begin by describing formation of universal gates and more. They conclude by stating the output characteristics are in match with the multiplexer.