Design of a Custom VEE Core in a Chip Multiprocessor

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Executive Summary

Chip multiprocessors provide an opportunity for continuing performance growth in the face of limited single-thread parallelism. Although the best design path for such chips remains open, application-specific core designs have shown promise. This work considers the design of an application-specific core for a virtual execution environment. The authors use Pin, a widely-used dynamic binary instrumentation system, as a representative process-level VEE. Through a combination of micro-architectural simulation and hardware performance counters, they profile the VEE in terms of cache behavior, functional unit usage, and branch predictor behavior, and compare its performance to the performance of benchmark applications.

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