Designing Embedded Systems for Testability

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Executive Summary

The purpose of this paper is to provide a context of how to utilize the test and debug features to design systems using Intel embedded processors and chipsets. There are various interfaces of the design which must be implemented. In some cases the interfaces must be shared, depending upon operation at a particular point in time. For example, the eXtended Debug Port (XDP) port utilizing the Test Access Port (TAP) controller during debug and manufacturing/self test equipment utilizing the TAP controller during board verification. Understanding the implementation is key to designing a successful product in terms of time-to-market. This application note specifically focuses on the TAP controller facilities, XDP facilities, and the XOR facilities provided on the chips.

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