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Direct Digital Frequency Synthesizer with CORDIC Algorithm and Taylor Series Approximation for Digital Receivers

Date Added: May 2009
Format: PDF

In this paper, the authors are presenting a new approach to design an optimized Direct Digital Frequency Synthesizer (DDFS) for complex demodulation used in digital receivers. For that, they suggest an adaptation of the phase to sine converter by combining the two following techniques: an optimized COordinate Rotation DIgital Computer (CORDIC) algorithm and the principle of Taylor series approximation. To validate their proposed approach, a DDFS with 8 Hz tuning frequency resolution and 20 bits output data (for sine and cosine waves) is being implemented in Xilinx FPGA device giving a maximum operating frequency of more than 306 MHz and a Spurious Free Dynamic Range (SFDR) of 112 dBc.