Dynamic MIPS Rate Stabilization in Out-of-Order Processors

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Executive Summary

Today's micro-processor cores reach high performance levels not only by their high clock rate but also by the concurrent execution of a large number of instructions. Because of the relationship between power and frequency, it becomes attractive to run an OoO (Out-of-Order) processor at a frequency lower than its nominal frequency in the context of embedded or real-time systems. Unfortunately, whereas OoO processors have high average throughput, their highly variable and hard-to-predict execution rate make them unsuitable for real-time systems with hard or even soft deadlines.

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