Efficient Implementation of Address Generator for WiMAX Deinterleaver on Xilinx FPGA
Wireless technology is emerged as the path breaking research areas in the modern communication domain. The key difficulties used in the modulation schemes for WiMAX deinterleaver design, as mentioned by IEEE 802.16 standard, needs ample hardware if all the modulation schemes and code rates have to be designed on FPGA. Floor function is the one which makes the design extremely hardware impotence. This paper is an attempt towards removing the hardware impotence in the implementation of the permutations by making use of simple mathematical algorithms.