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In this paper, improved algorithms for radix-8 FFT are presented. Various schemes have been proposed for computing FFT. It has Different target domains of applications and different tradeoffs between flexibility and performance. Typically, they need reconfigurable array of processing elements .The applications have been restricted to domains based on floating arithmetic. The authors introduce floating-point Arithmetic which is based on processing elements. After developing the FFT design they present a routing Algorithm and use topology to reduce power dissipation. These modified radix-8 algorithms provide savings of more than 33% in the number of twiddle factor evaluations.
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