Efficient Memory Management of a Hierarchical and a Hybrid Main Memory for MN-MATE Platform
The advent of many-core in computing architecture causes severe energy consumption and memory wall problem. Thus, emerging technologies such as on-chip memory and Non-Volatile memory (NVRAM) have led to a paradigm shift in computing architecture era. For instance, nonvolatile memories like PRAM can be viable DRAM replacements, achieving competitive speeds at lower power consumption. On-chip memory such as 3D-stacked memory can solve the limitation of memory bandwidth. The confluence of these trends offers a new opportunity to rethink traditional computing system and memory hierarchies. In an attempt to mitigate the energy and memory wall, the authors propose a new architecture with a hierarchical and a hybrid main memory for many-core system, termed MN-MATE.