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Embedding a System on a Programmable Chip with in the constraint of available resources brings out ingenuity of a SoPC designer. The paper covers an efficient Soft processor based USB communication device driver implementation on FPGA using a 10% foot print so as to set aside the rest 90% of the logic resources of the programmable chip for other compute and control intensive tasks. Using a Soft processor on FPGA to interface a peripheral is a convenient choice so that the task of the device driver development can be off loaded to a software developer.
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