Energy Characterization and Instruction-Level Energy Model of Intel's Xeon Phi Processor
Current processors increasingly exploit Thread-Level Parallelism (TLP) to improve performance. As a result, multi-core/multi-thread processors are becoming the dominant architectures for domains ranging from mobile platforms to high-performance computing. As technology scales, the number of transistors available will continue to grow every generation. To make full use of those transistors and further exploit the potential of TLP, architects will design chips with larger core counts. While software developers have been focusing on the use of many-core/multi-thread processor to boost throughput, performance per watt is crucial.