Processors Investigate

Evaluation of MuCCRA-D: A Dynamically Reconfigurable Processor With Directly Interconnected PEs

Download now Free registration required

Executive Summary

Coarse-grained Dynamically Reconfigurable Processor Arrays (DRPAs) have been received an attention as a flexible and efficient o -loading engine for various types of System-on-Chips (SoCs). Interconnection in these architectures is one of the important factors to be evaluated. MuCCRA-1, the first prototype of MuCCRA(Multi-Core Configurable Reconfigurable Architecture) project, uses a typical island-style interconnection in its PE array. Although the island-style interconnection is flexible, the large delay time caused by passing multiple switches and long wires often degrades its clock frequency.

  • Format: PDF
  • Size: 228.4 KB