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This paper presents the implementation details and experimental evaluation results of a high-performance Multiple-Input Multiple-Output (MIMO) detector for new generation wireless LAN systems. Performance of an IEEE 802.11n compliant FPGA-based prototype equipped with a dual MIMO processing unit is evaluated in a small office environment for both linear MMSE and lattice-reduction aided detection modes. Experimental results for MIMO configurations transmitting two independent data streams show performance gains for the reduced-lattice detector comparable to those obtained when adding an extra receiver antenna for spatial diversity in the linear case, with only a moderate increase in receiver complexity.
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