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Exploring Temperature-Aware Design of Memory Architectures in VLIW Systems

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Executive Summary

This paper presents a thermal model to analyze the temperature evolution in the shared register files found on VLIW systems. The use of this model allows the analysis of several factors that have an strong impact on the heat transfer: layout topology, placement and memory accesses. Finally, some relevant conclusions are obtained after analyzing the thermal behavior of several multimedia applications. As technology scales, higher power consumption coupled with smaller chip area will result in higher power density, which in turn will lead to higher power temperature on the chip. In fact, extrapolating the changes in microprocessor organization and the device miniaturization, one can project future power density to 200W/cm2.

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