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The paper has recently proposed a novel architecture called Output Buffered Switch with Input Groups (OBIG) together with a scheduler called Parallel Wrapped Wave Front Arbiter with Fast Scheduler (PWWFA-FS) for building large, fast switches. This paper continues this work and tackles the issue of flow control. The paper shows how on/off and credit flow control schemes can be applied in OBIG; it further introduces implicit flow control that does not use any explicit control information. Simulation results show how the proposed flow control schemes perform in the architecture.
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