Flow Regulation for On-Chip Communication

Free registration required

Executive Summary

IPs for a SoC are typically developed concurrently using a standard interface, for example, AXI or OCP. Despite the standard interfaces, integrating IPs to a SoC infrastructure presents challenges because traffic flows from IPs are diverse and typically they have stringent performance constraints; the impact of interferences among traffic flows is hard to analyze; due to the cost constraint, buffers in the SoC infrastructure must not be over-dimensioned while still satisfying performance requirements even under worst case conditions.

  • Format: PDF
  • Size: 132.9 KB