FPGA Based Truncated Multipliers: A Study of Latency in FPGA Devices
Real time medical imaging applications require efficient algorithms. The Field Programmable Gate Arrays (FPGAs) have the ability to realize such applications in terms of speed, less power dissipation and covering less area. This paper presents the FPGA based truncated multipliers delay study; implemented on Spartan-3AN, Virtex-E, Virtex and Virtex-5 FPGAs using Very high speed integrated circuit Hardware Description Language (VHDL). The delay study was analyzed using ANalysis Of VAriance (ANOVA) method using the software Statistical Package for Social Science (SPSS). The one way ANOVA method followed by post hoc Tukey's test using the software SPSS with a .05 significance level was used to compare the FPGA devices.