FPGA Implementation for Minimum Differential Feedback of MIMO-OFDM Transreceiver System
The latest research trend in wireless communication is implementing wireless system on SDR (Software Define Radio), so the SDR implementation of MIMO-OFDM receiver with channel state information is presented in this paper. Here the authors use Xilinx 13.1 Spartan 3 xc3s400pq208 FPGA device. The simulation results are obtained for 2x2 MIMO-OFDM receiver system in which they have implemented channel estimation, FFT, deinterleaver and decoder blocks in VHDL. The performance analysis of the receiver implementation is presented with resource utilization and timing analysis.