Hardware

FPGA Implementation of Four Phase Code Design Using Modified Genetic Algorithm (MGA)

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Executive Summary

The proposed architecture consists of an efficient VLSI hardware implementation of the Modified Genetic Algorithm for identifying the good pulse compression sequences based on Discrimination Factor. The main advantage of implementation using Hardware based Genetic Algorithm is its inherent speed over Software based methods. The speed advantage makes the hardware based Modified Genetic Algorithm (MGA) is a prime candidate for real time applications. This architecture provides the flexibility of generating Pulse compression sequences with variable frequencies. Radar signal processing applications require a set of sequences with individually peaky auto correlation and pair wise cross correlation.

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