FPGA Implementation of Optimized 4 Bit BCD and Carry Skip Adders Using Reversible Gates
The project proposes design of BCD adder and implementation of Carry Skip adder using the new concept of Reversible logic gate to improve the design in terms of garbage's and area on chip. Furthermore, in the recent years, reversible logic has emerged as a promising technology having its applications in low power CMOS, quantum computing, nanotechnology and optical computing because of it's zero power dissipation under ideal conditions. It is not possible to realize quantum computing without reversible logic gates. Thus, the project will provide the reversible logic implementation of the conventional BCD adder using NG and NTG gate and Carry skip adder using TSG.