Function Interface Models for Hardware Compilation: Types, Signatures, Protocols

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Executive Summary

The problem of synthesis of gate-level descriptions of digital circuits from behavioral specifications written in higher-level programming languages (hardware compilation) has been studied for a long time yet a definitive solution has not been forthcoming. The argument of this essay is mainly methodological, bringing a perspective that is informed by re-cent developments in programming-language theory. The authors argue that one of the major obstacles in the way of hardware compilation becoming a useful and mature technology is the lack of a well defined function interface model, i.e. a canonical way in which functions communicate with arguments. They discuss the consequences of this problem and propose a solution based on new developments in programming language theory.

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