Processors

Grouping-Based Dynamic Power Management for Multi-Threaded Programs in Chip-Multiprocessors

Free registration required

Executive Summary

In the embedded systems field, the research focus has shifted from performance to considering both performance and power consumption. Previous research has investigated methods to forecast the processing behavior of programs and adopt Dynamic Voltage and Frequency Scaling (DVFS) technique to adjust the frequency of processor to meet the needs of various phase behavior of threads of programs. However few researches have paid attention to the overhead of DVFS. Generally, DVFS brings processor core unavailable time from 10"s to 650"s. Adjusting frequency for every thread may encounter unanticipated overhead especially for multi-threaded programs.

  • Format: PDF
  • Size: 2516 KB