Hardware Implementation of Mix Column Step in AES
To make a data in hidden form, it is necessary to change the data from its original form. Cryptography is the art of representation of data from its original form to another form which is not readable. For this purpose several algorithms are used in cryptography. AES is a cryptographic algorithm used to protect electronic data. This document gives the hardware implementation of Mix Column step in AES encryption process. The AES encryption process consists of several transformation steps such as byte substitution, shift rows, mix column and addition of round key operation step. There are two aspects to perform mix column step in AES is presented. The total operation is coded with VERILOG, synthesized and simulated using Xilinx ISE 10.1.