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Block replacement algorithms to increase hit ratio have been extensively used in cache memory management. Among basic replacement schemes, LRU and FIFO have been shown to be effective replacement algorithms in terms of hit rates. In this paper, the authors introduce a flexible stack-based circuit which can be employed in hardware implementation of both LRU and FIFO policies. They propose a simple and efficient architecture such that stack-based replacement algorithms can be implemented without the drawbacks of the traditional architectures. The stack is modular and hence, a set of stack rows can be cascaded depending on the number of blocks in each cache set. The circuit can be implemented in conjunction with the cache controller and static/dynamic memories to form a cache system.
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