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Reed Solomon (RS) codes are widely used to detect and correct data errors in transmission and storage systems. Hence it is used in many digital communication and storage devices. In existing system Reformulated inversion less Burst error Correcting (RiBC) algorithm is used. But it lacks in speed, throughput & area. To overcome this Algebraic Soft Decision (ASD) algorithm is proposed. This Proposed algorithm is based on Unified VLSI architecture for correcting burst errors as well as random errors. This new architecture is denoted as Unified Hybrid Decoding (UHD) architecture. It will be shown that, being the first RS decoder owning enhanced burst-error correcting capability, it can achieve high-speed, throughput and improved error correcting capability than traditional Hard Decision Decoding (HDD) design with less area.
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