High Speed Pipelined AES with Mixcolumn Transform
In this paper, high throughput 128 bit AES is achieved by using pipelined architecture. The speed is further enhanced by inserting compact and flexible architecture for MixColumn transform. The authors suggest, fixed coefficient multiplier for MixColumn operation and an equivalent pipelined AES architecture by changing the inner process order in round transformation which leads to effective utilization of resources and Increase in speed. The proposed pipelined algorithm achieves a high data throughput when compared with other methods.