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Traditional Software-Defined Radio (SDR) architectures cannot go with the requirements of embedded systems, specially in terms of performance and power consumption. Low-power FPGAs now reaching the market might soon become a viable alternative to overcome such limitations. The HYbrid Radio Architecture (HYRA) introduced in this paper contributes to this scenario as it explores the Hybrid HW/SW Component concept to enable the implementation of SDRs as direct mappings of high-level synchronous data flow models. Although addressing SDR from a higher level of abstraction, HYRA mechanisms proved far more efficient than those behind GNU Radio when the target is an embedded reconfigurable hardware platform.
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