Hardware

Implementation of Area Efficient Memory-Based FIR Digital Filter Using LUT-Multiplier

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Executive Summary

Memory based structures are well-suited for many Digital Signal Processing (DSP) applications, which involve multiplication with a fixed set of coefficients. Memory-based structures are more regular compared with the multiply-accumulate Structures and have many other advantages of less area and reduced latency implementation since the memory-access-time is much shorter than the usual multiplication-time compared to the conventional multipliers. Distributed Arithmetic (DA)-based computation is popular for its potential for efficient memory-based implementation of Finite Impulse Response (FIR) filter.

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