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This paper presents the implementation of March Algorithm based Memory Built-In Self Test (MBIST) architecture for Static Random Access Memory (SRAM). A Finite State Machine (FSM) is designed to implement March - based Test algorithm. Also SRAM block and the interfacing modules are presented. There is a standard March Test Algorithm with 22N where N is the number of memory words, read/write operations is discussed. The proposed March test algorithm with 13N can achieve full diagnosis for SRAM. This digital system is described in Verilog HDL and is simulated and synthesized using Xilinx Spartan 3 FPGA.
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