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Due to the increasing capacity and complexity of semiconductor technology, current design for System-on-Chip (SoC) faces big challenges from many aspects, such as Deep SubMicron (DSM) Effects, Global Synchrony, Communication Architecture, etc. Network-on-Chip (NoC) is an emerging achievement in recent years to tackle with the crisis of communications within large VLSI systems implemented on a single silicon chip. The way to schedule the traffic flows between different modules such as processor cores, memories and specialized Intellectual Property(IP) blocks became a important problem in NoC research. This paper presents a Time Division Multiplexing (TDM) virtual circuit based strategy that minimizes resource usage by exploiting routing flexibilities offered by modern NoCs.
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