Hardware

Implementation of User Interface for Microprocessor Trainer

Date Added: Aug 2011
Format: PDF

This paper aims to design and construct the microcontroller-based user interface system and to study input, computation, and output for microprocessor trainer. The other two activities beyond computation: input and output or I/O. This paper also aims to do high quality research in the area of file systems, as well as develop a good implementation on at least one computer system. A computer system's I/O performance must be commensurate (equal) with its CPU performance if the I/O system is not to limit the system's total throughput. When hundreds to thousands of such high performance micro-processors are closely connected in scalable array architecture, the enormous CPU performance of the multi-computer requires an I/O system with correspondingly high performance.