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Recent embedded computing platforms offer multiple independent clocks for different components involved in processing a single instruction stream, such as CPU and memory, giving rise to a new category of power management policies, called MultiDVS, where the different components can be clocked down to different degrees, independently. This paper presents the first MutliDVS scheme with Dynamic Power Management (DPM), where the system can be put to sleep or components can be clocked down. The authors model power consumption in such a system, and use this model to investigate MultiDVS+DPM policies.
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