IOMMU: Strategies for Mitigating the IOTLB Bottleneck

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Executive Summary

The Input/Output Memory Management Unit (IOMMU) was recently introduced into mainstream computer architecture when both Intel and AMD added IOMMUs to their chip-sets. An IOMMU provides memory protection from I/O devices by enabling system software to control which areas of physical memory an I/O device may access. However, this protection incurs additional Direct Memory Access (DMA) overhead due to the required address resolution and validation. IOMMUs include an Input/Output Translation Lookaside Buffer (IOTLB) to speed-up address resolution, but still every IOTLB cache-miss causes a substantial increase in DMA latency and performance degradation of DMA-intensive workloads.

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