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As cache management in chip multiprocessors has become more critical because of the diverse workloads, increasing working sets of many emerging applications, increasing memory latency and decreasing size of cache devoted to each core due to increased number of cores on a single chip in Chip multiprocessors (CMPs). This paper identifies caching techniques and important issues in caching techniques in chip multiprocessor for managing last level cache to reduce off chip access to improve the system performance under critical conditions and suggests some future directions to address the identified issues.
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