Level Shifter Design for Low Power Applications
With the growing demand of handheld devices like cellular phones, multimedia devices, personal note books etc., low power consumption has become major design consideration for VLSI circuits and system,. With increase in power consumption, reliability problem also rises and cost of packaging goes high. Power consumption in VLSI circuit consists of dynamic and static power consumption. Dynamic power has two components i.e. switching power due to the charging and discharging of the load capacitance and the short circuit power due to the non-zero rise and fall time of the input waveforms. The static power of CMOS circuits is determined by the leakage current through each transistor. Power consumption of VLSI circuits can be reduced by scaling supply voltage and capacitance.