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To ensure security and robustness of the next generation of Physically Unclonable Functions (PUFs), the authors have developed a new methodology for PUF design. The authors' approach employs integration of three key principles: inclusion of multiple delay lines for creation of each response bit; transformations and combination of the challenge bits; and combination of the outputs from multiple delay lines; to create modular, easy to parameterize, secure and reliable PUF structures. Statistical analysis of the new structure and its comparison with existing PUFs indicates a significantly lower predictability, and higher resilience against circuit faults, reverse engineering and other security attacks.
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