Mapping Out a Path From Hardware Transactional Memory to Speculative Multithreading
This research demonstrates that coming support for hardware transactional memory can be leveraged to significantly reduce the cost of implementing true speculative multithreading. In particular, it explores the path from eager conflict detection HTM to full support of efficient speculative multithreading, focusing on the case where frequent memory dependencies exist between speculative threads. The result is a unified memory architecture capable of effective support for transactional parallel workloads and efficient speculative multithreading. Transactional Memory (TM) has been proposed as a powerful programming primitive for shared memory multiprocessors to replace traditional lock-based synchronization.