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This paper presents Model-T, an OS network stack designed to scale to terabit rates through pipelined execution of micro operations. Model-T parallelizes execution on multicore chips and enforces lockstep processing to maximize shared L2 data cache (d-cache) hitrate. Executing all operations without hitting main memory more than once (if at all) is the key design principle behind Model-T. The authors show a prototype implementation that indeed handles terabit rate network traffic when accessing only the L2 cache and processing only headers.
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