Hardware

Modeling of Reliability for Programmable Nanowires Interconnect

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Executive Summary

A Field-Programmable Nanowire Interconnect (FPNI) is from hybrid CMOS/nano circuit family, that generalizes CMOL (CMOS/molcular hybrid) proposed by Likharev, that reparieren technology for a Field-Programmable Gate Array (FPGA) architecture by lifting the configuration bit and associated components out of the semiconductor plane and replacing them in the interconnect with nonvolatile switches, which decreases both the area and power consumption of the circuit. Because this architecture has terrible properties, make challenges for reliability in this architecture. Thus for reduce limitations and defect devices purposed, use from self-organization system replace Boolean logic.

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