Multi-Path Routing in Time-Division-Multiplexed Networks on Chip

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Executive Summary

The exponential increase in transistor count due to technological progress has resulted in an increase in complexity and processing power of on-chip elements. Recently a stage has been reached where it is not practical anymore to increase the core size, and as a consequence the number of cores, processing elements or peripherals is being increased instead. In this study authors focus on improving the efficiency of a network between those processing elements using alternative routing strategies. Authors focus on a multi-path slot allocation method in networks with static resource reservations, in particular networks on chip (NoC) employing Time-Division Multiplexing (TDM). The simplicity of these networks makes it possible to implement this routing scheme without significant hardware overhead.

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