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An architecture for an integrated low-power, high-bandwidth optical interconnection network based on microring resonator technology is presented. The layout of the non-blocking network is described and a simulation-based performance evaluation is conducted. The recent trend toward Chip MultiProcessors (CMPs) in modern high-performance computing and communication systems has highlighted the need for a low-latency, high-bandwidth networking infrastructure. Switched on-chip global networks have been proposed as an attractive solution to mitigate the emerging communications bottleneck apparent in current generation electronic cross-chip point-to-point interconnects.
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