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Asymmetric or heterogeneous Multi-Core (AMC) architectures have definite performance, performance per watt and fault tolerance advantages for a wide range of workloads. The authors propose a 16 core AMC architecture mixing simple and complex cores, and single and multiple thread cores of various power envelopes. A priority-based thread scheduling algorithm is also proposed for this AMC architecture. Fairness of this scheduling algorithm vis-a-vis lower priority thread starvation, and hardware and software requirements needed to implement this algorithm are addressed. They illustrate how this algorithm operates by a thread scheduling example.
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