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The rapid development of Network-on-Chip (NoC) calls for a systematic approach to evaluate and fairly compare various NoC architectures. In this specification, the authors define a generic NoC architecture, a comprehensive set of synthetic workloads as micro-benchmarks, workload scenarios and evaluation criteria. These micro-benchmarks enable measuring particular properties of NoC architectures, complementing application benchmarks. Network-on-Chip (NoC) has been recognized as a promising architecture to accommodate tens, hundreds or even thousands of cores. As a result, a number of NoC architectures have been and are being proposed.
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