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The general-purpose computing industry is at a major crossroads. Power constraints and design complexity have pushed microprocessor designers to use multiple execution cores on a single die, with 4-16 cores being commonplace today, many tens of cores expected in the next 3-5 years, and some projections claiming hundreds of cores on a chip within a decade. Increases in application performance will depend on their ability to harness this parallelism. In the past, new software capabilities and technologies have been strongly driven by increases in processor performance (keeping up with increasing memory capacity and network bandwidth). In the future, such advances in mainstream applications will only occur if software developers are able to harness parallelism for higher performance.
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