Performance Analysis of Cryptographic VLSI Data
Cryptographic algorithms are more efficiently implemented in custom hardware than in software running on general-purpose processors. The hardware implementation approaches for the AES (Advanced Encryption Standard) Algorithm describes the design and performance testing Rijndael algorithm. Compared to software implementation, hardware implementations provide more physical security as well as higher speed. An optimized coding for the implementation of Rijndael algorithm for 256 bytes has been developed. The speed factor of the algorithm implementation has been targeted and a software code in verilog which boasts of a throughput of 2.18 Gb/sec has been developed.