Performance Evaluation of AES Algorithm as a Peripheral in SOC
The Advanced Encryption Standard (AES)is a symmetric block cipher operating on fixed block sizes of 128Bit and is specified for key sizes of 128, 192 and 256 Bit designed by Joan Daemen and Vincent Rijmen. The algorithm was standardized by National Institute of Standards and Technology (NIST). This component implements an AES encryption &decryption data path in Electronic Code Book (ECB) mode with either 128,192 or 256 Bit keys. The key length is determined by generics at compile time. Also the decryption data path can be disabled by generics if it is not needed for the application. AlteraNios II processor can be used to improve Nios II embedded system implementations in terms of speed and area.