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Prior research demonstrates that temporal memory streaming and related address-correlating prefetchers improve performance of commercial server workloads through increased memory level parallelism. Unfortunately, these prefetchers require large on-chip meta-data storage, making previously-proposed designs impractical. Hence, to improve practicality, researchers have sought ways to enable timely prefetch while locating meta-data entirely off-chip. Unfortunately, current solutions for off-chip meta-data increase memory traffic by over a factor of three. The authors observe three requirements to store meta-data off chip: minimal off-chip lookup latency, bandwidth efficient meta-data updates, and off-chip lookup amortized over many prefetches.
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